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Jean A. Hoerni

Method of Manufacturing Semiconductor Devices

U.S. Patent No. 3,025,589
Inducted in 2009
Born Sept. 26, 1924 - Died Jan. 12, 1997

Early in 1959 while at Fairchild Semiconductor, Jean Hoerni invented the planar manufacturing process, a method in which a silicon wafer is repeatedly coated with silicon oxide and precisely engraved so that the components of a transistor can be deposited in interconnected layers on the surface. This method solved the reliability issues that had plagued Fairchild Semiconductor's state-of-the-art "mesa" transistors, led to the development of Robert Noyce's integrated circuit, and is still relied upon for the manufacture of today's modern integrated circuits.

Hoerni, a native of Geneva, Switzerland, was among the eight men who left Shockley Semiconductor to found Fairchild Semiconductor. Hoerni left Fairchild in 1961 to found Teledyne's Amelco division. In 1963, he left to lead a Union Carbide research division. He founded the firm Intersil in 1967, and a later a firm called Telmos. He served as a consultant to semiconductor firms around the world.

Trained as a theoretical physicist, Hoerni held undergradute and Ph.D. degrees from the University of Geneva and another Ph.D. from Cambridge University. An avid high-altitude hiker, Hoerni created the Central Asia Institute to enable Greg Mortenson to build schools in remote areas of Pakistan and Afghanistan.

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